1    package com.simplifide.scala2.test.language 
2     
3    import com.simplifide.generate.generator.CodeWriter 
4    import com.simplifide.generate.language.Conversions._ 
5    import com.simplifide.generate.parser.block.state.{StateModel, State} 
6    import com.simplifide.generate.blocks.basic.flop.ClockControl._ 
7    import com.simplifide.generate.blocks.basic.flop.ClockControl 
8    import com.simplifide.generate.project2.{Project, Module} 
9    import java.lang.annotation.Documented 
10   import com.simplifide.generate.hier2.Entity 
11   import com.simplifide.scala2.test.language.SignalProcessingTest.TestCase 
12   import com.simplifide.generate.TestConstants 
13   import com.simplifide.generate.signal.{Constant, SignalTrait} 
14   import com.simplifide.generate.signalproc.Filter 
15   import com.simplifide.generate.signal.Constant._ 
16   import com.simplifide.generate.test.Test._ 
17   import com.simplifide.generate.test.{Test, Isim, TestModule} 
18    
19    
20    
21    
22   /** 
23    * This test case is a simple state machine which shows the simplified syntax which can be used for a state machine 
24    * construction. For the case of the state machine additional documentation is created in the dot directory which 
25    * contains a .dot file which can be used for a diagram as well as some html descriptions. 
26    * 
27    * The design files can be found at      http://scaladl.com/examples/state/design/

28    * The test files can be found at        http://scaladl.com/examples/state/test/

29    * The html documentation can be found athttp://scaladl.com/examples/state/doc/

30    * 
31    */ 
32    
33   class StateMachineTest { 
34    
35   } 
36    
37   object StateMachineTest { 
38    
39     /** Project which contains a simple state machine example */ 
40     class StateMachineProject extends Project { 
41       // Set the Base Location for the Project 
42       val location:String = TestConstants.locationPrefix + "outputs" + TestConstants.separator + "state" 
43       // Create the Clock 
44       implicit val clk = ClockControl("clk","reset") 
45       // Main Module for the Design 
46       override val root = new StateMachineEntity() 
47           // Defines the Tests for this project 
48       override val tests    = List(Test(new TestCase(root))) 
49       // Selects the simulator for this module - ISIM for this case 
50       override val testType = Some(new Isim(this)) 
51     } 
52    
53     //** Entity which contains the state 
54     class StateMachineEntity()(implicit clk:ClockControl) extends Entity.Root("state_machine","state_machine") { 
55       // Creation of the Input and Output Signals for the test 
56       val condition = signal("condition",INPUT,U(3,0)) 
57       val result    = signal("state",REGOUT,U(3,0)) 
58       // Adding the Input and Output Signals to the module 
59       override val signals = clk.allSignals(INPUT) ::: List(condition,result) 
60       // Module Creation 
61       override def createModule = new StateMachine(this).createModule 
62     } 
63    
64     class StateMachine(entity:StateMachineEntity)(implicit clk:ClockControl) extends Module("state_machine") { 
65       import entity._ 
66    
67       // Description of the module 
68       description = Some(<p>This is a basic <i>state machine</i> used for testing.</p> ) 
69       // Internal Signal Declarations 
70       val next        = signal("next" ,REG, unsigned(3,0)) 
71       // State Definitions 
72       val stateA = State("a",0) -- <p><i>State</i> A</p> 
73       val stateB = State("b",1) -- "State B" 
74       val stateC = State("c",2) -- "State C" 
75       val stateD = State("d",3) -- "State D" 
76       val stateE = State("e",4) -- "State E" 
77       // State Machine Model Definition 
78       // The first clause with the arrow specifies the transition (stateA -> stateB) 
79       // The Second clause followed by the ## Specifies the transition condition  ## (condition == 2) 
80       val gr = StateModel((stateA -> stateB) ## (condition == C(3,2))             -- "StateA to StateB Comment", 
81                           (stateB -> stateC) ## (condition == C(3,2))             -- "StateB to StateC Comment", 
82                           (stateC -> stateD) ## (condition == C(3,1))             -- "StateC to StateD Comment"  , 
83                           (stateD -> stateE) ## (condition == C(3,0))             -- "StateD to StateE Comment", 
84                           (stateE -> stateA) ## (condition == C(3,4))             -- "StateE to StateA Comment", 
85                           (stateE -> stateC) ## (condition == C(3,1))             -- "StateE to StateC Comment") 
86       // The state machine is added to the module 
87       state_machine(gr,clk,result,next, "Basic State Machine") 
88     } 
89    
90       /** Test Case for the State Machine */ 
91     class TestCase(val entity:StateMachineEntity)(implicit clk:ClockControl) extends TestModule("state_test",entity) { 
92       // Run the condition which controls the state machine like a counter 
93       // The assigment is handled by the --> key. The input is a function which input x mod 8 
94       entity.condition --> (x => x % 8,1000) 
95       this.createTest 
96     } 
97    
98    
99       def main(args:Array[String]) = { 
100        new StateMachineProject().createProject2 
101      } 
102  }