The current hardware design languages are very good at describing low level hardware functions, but they are not good at higher level abstractions and paramerization. This is for the most part positive as it keeps engineers thinking about what the actual code maps to in terms of hardware. The newer generation of tools attempt to use higher level languages to abstract away from the hardware and allow the tools to create micro-architectures. These tools are good for certain simple designs but tend to break down in complicated problems where human involvement is required. The proper solution to the problem is not to abstract away from the hardware like some of the current HLS tools, but instead to allow an easier more natural language for solving the problem.
ScalaDL is a code generator for hardware languages implemented as an internal DSL inside Scala. The base language contains syntax close to verilog, with the power of an advanced software language for scripting, as well as adding more abstract descriptions for common operations like signal processing, state machines, and others.
There has been major refactoring of ScalaDL as well as numerous bug fixes since the latest release contained in this website. The release should probably be available around mid March. Going forward I am strongly considering making this project open source assuming appropriate interest. Please email firstname.lastname@example.org if you have any interest in this effort.